UNIDENTIFIED

UNI-486WB LIGHT GREEN

Processor

CX486M6/80486SX/CX486S2/80487SX/CX486M7/80486DX/80486DX2/ Pentium Overdrive

Processor Speed

20/25/33/40/50(internal)/50/66(internal)MHz

Chip Set

UNI

Max. Onboard DRAM

64MB

Cache

32/64/128/256/512KB

BIOS

AMI/Award

Dimensions

248mm x 218mm

I/O Options

32-bit VESA local bus slots (2)

NPU Options

None

CONNECTIONS

Purpose

Location

Purpose

Location

Power LED & keylock

CN1

Turbo LED

CN5

Speaker

CN2

External battery

J1

Reset switch

CN3

32-bit VESA local bus slots

SL1 & SL2

Turbo switch

CN4

   

USER CONFIGURABLE SETTINGS

Function

Jumper

Position

»

Battery type select internal

J1

pins 2 & 3 closed

 

CMOS memory clear

J1

pins 3 & 4 closed

 

CMOS memory clear (see note below)

J1

pins 3 & 4 closed

»

Factory configured - do not alter

JP1

N/A

»

Factory configured - do not alter

JP2

N/A

»

Factory configured - do not alter

JP9

pins 2 & 3 closed

»

Factory configured - do not alter

JP12

pins 2 & 3 closed

 

PQFP CPU disabled

JP13

Closed

 

PQFP CPU enabled

JP13

Open

»

Factory configured - do not alter

JP27

Closed

»

Regular I/O reset

JP29

pins 1 & 2 closed

 

Special I/O reset (CP 30254 HDD)

JP29

pins 2 & 3 closed

 

Battery type select NI-CD

JP33

pins 1 & 2 closed

 

Battery type select Lithum

JP33

pins 2 & 3 closed

 

Monitor type select color

JP34

Closed

 

Monitor type select monochrome

JP34

Open

Note: If Lithum battery is installed, close jumper 1 & 2 on JP33. The location of JP29 is unidentified.

DRAM CONFIGURATION

Size

Bank 0

Bank 1

Bank 2

1MB

(4) 256K x 9

NONE

NONE

1MB

NONE

(1) 256K x 36

NONE

2MB

(4) 256K x 9

NONE

(1) 256K x 36

4MB

(4) 1M x 9

NONE

NONE

4MB

NONE

(1) 1M x 36

NONE

5MB

(4) 256K x 9

NONE

(1) 1M x 36

8MB

(4) 1M x 9

NONE

(1) 1M x 36

16MB

(4) 4M x 9

NONE

NONE

20MB

(4) 4M x 9

NONE

(1) 1M x 36

64MB

(4) 16M x 9

NONE

NONE

CACHE CONFIGURATION

Size

Bank 0

Bank 1

TAG

32KB

(4) 8K x 8

NONE

(1) 8K x 8

64KB (A)

(4) 16K x 8

NONE

(1) 8K x 8

64KB (B)

(4) 8K x 8

(4) 8K x 8

(1) 8K x 8

128KB

(4) 32K x 8

NONE

(1) 8K x 8

256KB (A)

(4) 64K x 8

NONE

(1) 16K or (1) 32K x 8

256KB (B)

(4) 32K x 8

(4) 32K x 8

(1) 16K or (1) 32K x 8

512KB

(4) 128K x 8

NONE

(1) 32K x 8

CACHE JUMPER CONFIGURATION

Size

JP22

JP23

JP24

JP25

32KB

Open

Open

Open

6 & 7

64KB (A)

Open

Open

Closed

4 & 5, 6 & 7

64KB (B)

Open

Open

Closed

5 & 6

128KB

Closed

Open

Closed

2 & 3, 4 & 5, 6 & 7

256KB (A)

Closed

Open

Closed

2 & 3, 4 & 5, 6 & 7

256KB (B)

Closed

Open

Closed

1 & 2, 3 & 4, 5 & 6

512KB

Closed

Closed

Closed

2 & 3, 4 & 5, 6 & 7

Note: Pins designated should be in the closed position.

CPU TYPE CONFIGURATION

Type

JP10

CX486M6

pins 5 & 6 closed

80486SX

pins 5 & 6 closed

80487SX

pins 2 & 3, 4 & 5, 6 & 7 closed

80486DX

pins 1 & 2, 4 & 5, 6 & 7 closed

CX486M7

pins 1 & 2, 4 & 5, 6 & 7 closed

80486DX2

pins 1 & 2, 4 & 5, 6 & 7 closed

Pentium Overdrive

pins 2 & 3, 4 & 5, 6 & 7 closed

CPU TYPE CONFIGURATION

Type

JP28

JP32

Any CPU installed

pins 2 & 3 closed

pins 1 & 2 closed

CX486M6 only

pins 1 & 2 closed

pins 2 & 3 closed

CPU TYPE CONFIGURATION

Type

JP6

Any CPU installed

Open

CX486S2 only

Closed

CPU TYPE CONFIGURATION

Type

JP8

JP11

Any CPU installed

Open

pins 1 & 2 closed

CX486M6/Pentium Overdrive only

Closed

pins 2 & 3 closed

CPU SPEED CONFIGURATION (KTS-802C PLL5205 ONLY)

Speed

JP14

JP15

JP16

20MHz

Open

Open

Closed

25MHz

Closed

Open

Closed

33MHz

Closed

Closed

Closed

40MHz

Open

Open

Open

50iMHz

Closed

Open

Closed

50MHz

Open

Open

Open

66iMHz

Closed

Closed

Closed

CPU SPEED CONFIGURATION (MX8310-15 ONLY)

Speed

JP17

JP18

JP19

20MHz

Open

Open

Open

25MHz

Closed

Open

Open

33MHz

Closed

Closed

Closed

40MHz

Closed

Closed

Open

50iMHz

Closed

Open

Open

50MHz

Open

Open

Closed

66iMHz

Closed

Closed

Closed

VL BUS SPEED CONFIGURATION

» CPU speed

JP3

»

<= 33MHz

Open

»

> 33MHz

Closed

VL BUS CONFIGURATION

Setting

JP20

JP21

SL2 set as a slave

pins 1 & 2 closed

pins 1 & 2 closed

SL2 set as a master/slave

pins 2 & 3 closed

pins 2 & 3 closed