HEDAKA

HED-988

Processor

80286

Processor Speed

12/16/20MHz

Chip Set

HEDAKA

Max. Onboard DRAM

4MB

SRAM Cache

None

BIOS

AMI

Dimensions

330.2mm x 218.4mm

I/O Options

None

NPU Options

80287

CONNECTIONS

Purpose

Location

Purpose

Location

Speaker

CN1

Turbo LED

CN5

Reset switch

CN2

Turbo switch

JP4

Power LED & keylock

CN3

External battery

JP5

USER CONFIGURABLE SETTINGS

Function

Jumper

Position

»

NPU mode select synchronous with CPU

JP1

pins 2 & 3 closed

 

NPU mode select synchronous with oscillator installed at OSC1

JP1

pins 1 & 2 closed

»

NPU speed select iOSC/3

JP2

pins 2 & 3 closed

 

NPU speed select iOSC/1

JP2

pins 1 & 2 closed

»

Monitor type select color

JP6

pins 2 & 3 closed

 

Monitor type select monochrome

JP6

pins 1 & 2 closed

»

CMOS memory normal operation

JP7

open

 

CMOS memory clear

JP7

closed

»

Parity check enabled

JP13

open

 

Parity check disabled

JP13

closed

Note:When JP7 is closed it also disables the password set in the CMOS

DRAM CONFIGURATION

Size

Bank 0(DIP)

P-0

Bank 1 (DIP)

P-1

Bank 0 (SIPP)

Bank 1 (SIPP)

512KB

(4) 44256

(2) 41256

NONE

NONE

NONE

NONE

512KB

NONE

NONE

NONE

NONE

(2) 256K x 9

NONE

1MB

(4) 44256

(2) 41256

(4) 44256

(2) 41256

NONE

NONE

1MB

NONE

NONE

NONE

NONE

(2) 256K x 9

(2) 256K x 9

1.5MB

(4) 44256

(2) 41256

(4) 44256

(2) 41256

(2) 256K x 9

NONE

2MB

(4) 44256

(2) 41256

(4) 44256

(2) 41256

NONE

NONE

2MB

NONE

NONE

NONE

NONE

(2) 1M x 9

NONE

4MB

NONE

NONE

NONE

NONE

(2) 1M x 9

(2) 1M x 9

DRAM JUMPER CONFIGURATION

Size

Jumper JP8

Jumper JP9

Jumper JP10

Jumper JP11

Jumper JP12

512KB

open

closed

closed

closed

closed

1MB

closed

open

closed

closed

closed

1.5MB

open

open

closed

closed

closed

2MB

closed

closed

open

closed

closed

2MB 1

closed

closed

open

closed

open

4MB

open

closed

open

closed

open

Note 1 :Setting represents (2) 1M x 9 SIPPs installed.